Inside the 140 Micro-Instructions Behind One 8087 Chip Instruction

Intel's 8087, released in 1980, was an add-on chip that plugged in alongside the 8086 or 8088 processor and handled floating-point math the main chip could not do efficiently on its own. It made floating-point calculations up to 100 times faster than doing the same work in software on the CPU alone, which is why the original IBM PC left a socket for one.

That 100-times figure describes what the chip did from the outside. Nobody had a public map of what the 8087 was actually doing inside, at the microcode level, until a reverse-engineering effort called the Opcode Collective built one. Ken Shirriff detailed the results for a single instruction, FSCALE, in a Sept. 2026 post on his blog, righto.com.

What FSCALE is supposed to do

FSCALE scales a floating-point number by a power of two. Instead of multiplying a value by 2 raised to some exponent the ordinary way, the instruction adjusts the number's stored exponent directly, which is a far cheaper operation in hardware terms than a full multiplication. Shirriff writes that he expected FSCALE to be one of the simplest instructions in the chip's repertoire, the kind of thing that would take a few lines to explain.

Why 140 micro-instructions were needed for something that simple

It is not simple in practice. Shirriff's analysis found the FSCALE microcode uses more than 140 micro-instructions spread across three levels of subroutine calls, starting at microcode address 748. Even the straightforward case, scaling an ordinary normal number, takes about 22 micro-instructions before the chip is done. The rest of the routine exists to handle denormalized numbers, infinity, NaN values, zero, overflow, underflow and the 8087's several rounding modes, each routed through named subroutines including SPECIAL_TMPS, CREATE_DENORM, ADJUST_PRECISION and NONNORMAL_RESULT.

Approach	Code size
8087 Support Library (software emulation)	16 KB of 8086 code
8087 hardware microcode	3.3 KB

Intel sold that software alternative, the 8087 Support Library, for machines without the chip installed. The size gap between 16 kilobytes of general-purpose emulation code and 3.3 kilobytes of purpose-built microcode is a rough proxy for how much dedicated hardware bought Intel's customers in 1980, when a coprocessor built for one narrow class of math could out-collapse an entire software layer written to do the same job.

Who did the reverse engineering, and how

Shirriff credits two other Opcode Collective members, who go by Smartest Blob and Gloriouscow, with converting the 8087's ROM images into readable microcode data and analyzing its contents before he wrote up the FSCALE routine specifically. The group's broader project is reconstructing the 8087's full microcode instruction by instruction, decades after Intel treated that code as proprietary and never published it. That method mirrors a pattern that shows up again decades later, in a 2026 outside register map of Apple's Neural Engine that Apple itself never published either.

The project didn't start with FSCALE

Shirriff's FSCALE post is one entry in a longer effort. Hackaday writer Maya Posch covered the same reverse-engineering project on Jan. 11, 2026, describing how the 8087 implements conditional branches in hardware rather than software, using multiplexers built from pass transistors that route one of four possible inputs depending on the state of other functional blocks on the die, from the instruction decoder to individual registers. That earlier piece focused on instructions like cosine and arctangent, which Posch wrote also "decode into many microcode ops," the same pattern Shirriff later documented in detail for FSCALE specifically. Eight months separate the two write-ups, which gives some sense of how slowly a full, instruction-by-instruction map of a 46-year-old chip gets built by volunteers working from ROM dumps rather than Intel's own documentation.

What separates 1980 from now

Forty-six years separate the 8087 from the process technology chipmakers use today. ASML, TSMC and Samsung are already locked into 12-inch photomasks for the High-NA EUV tools that will make chips years from now, on production lines several generations removed from whatever produced the 8087's original die. The instruction set idea underneath both eras has not changed: dedicated silicon for one class of math beats general-purpose code, provided someone can still afford to build it and, in the 8087's case, provided someone is still willing to take it apart decades later to find out how.

Shirriff's post covers only FSCALE. The Opcode Collective's declared goal is the rest of the 8087's microcode, instruction by instruction, using the same ROM-derived method Smartest Blob and Gloriouscow built for this one.